The inventive concept relates to a semiconductor memory system, and more particularly, to a semiconductor memory system in which an error in data communication between a semiconductor memory device and a memory controller is simply detected.
As semiconductor memory devices increase in density and the speed of operating memory interfaces increases, the communication channel between a memory device and a memory controller is subject to increased channel noise, and the occurrence of errors in the transmission and reception of memory data, addresses, and commands is increased. When an error occurs in such data communication, the data, address, or command signals involved in the memory operation may have to be retransmitted, and processing and operational speed of the system can degrade significantly.